Overview
Modern ARM hardware has the ability to operate over a range of preset clock speeds (and voltage). Heat and power drain can be reduced by using a lower clock speed and voltage, at the expense of slower processing. The RISC OS operating system is able to switch clock speeds 'on the fly'. This means that the clock speed can be reduced during periods of low activity, and switched up when more processing is occurring. However, running the cpu hard will result in a rise in temperature of the cpu. Particularly during periods of high ambient temperature and poor case ventilation this rise can be substantial. See the CPUClock user guide for a fuller description of how RISC OS switches cpu speed.
The CPUClock module implements a means of monitoring the cpu die temperature. A temperature control mode is available which will automatically reduce the cpu clock speed if the temperature of the cpu rises during periods of high load. The trigger temperature is user definable. When the temperature has fallen sufficiently, the cpu fast clock speed will be reset to its higher value.
Since the core functionality is in the module, the control feature will continue to operate even if the wimp enters a non-multitasking period.
Applications, other than the CPUClock front end itself, can interact with the module, setting the operating parameters, and reading back data by means of a SWI interface. The available SWI calls are detailed below. One caveat - if more than one application is trying to control the module at the same time, the module may end up in a state different to that which a particular application expects it to be in.